Raspberry Pi AI: Why 25 TOPS Does Not Specify FPS
A 25 TOPS specification describes operations under particular compute conditions, not the number of useful video frames a complete application delivers each second. Decode, resizing, layout conversion, transfers, and postprocessing can still dominate a Raspberry Pi workload. Faster inference does not imply the same end-to-end speedup.
Contents
- What the report establishes
- Follow a frame through the whole application
- A fivefold inference speedup gives only 1.19× overall
- Eight exact checks make the budget inspectable
- Overlapping stages change the model
- Validate the deployed task before comparing speed
- Three watts is not the complete system budget
- Start with one complete, bounded vision task
- Sources and validation scope
Recent coverage of the Sixfab AI HAT+ and DEEPX provides a concrete example. Begin with correct model deployment, end-to-end latency, and system-level energy rather than converting TOPS directly into FPS. 中文版.
What the report establishes
Google News surfaced the October 16 EE Times Asia report, credited to DEEPX. It describes the DX-M 1M NPU on the third-party Sixfab AI HAT+, quoting up to 25 TOPS and approximately 3 W typical sustained NPU power. Those are attributed vendor claims, not measurements made for this article.
The report points back to an October 5 Raspberry Pi introduction; the board was already introduced, so the October 16 coverage is not a same-day first launch. The Sixfab page identifies the 25 TOPS rating as INT 8 and lists dedicated NPU memory. That does not establish equal performance for arbitrary precision or arbitrary models.
The useful deployment story is a supported-model compilation path alongside a host application that still handles cameras and other work. Local vision can reduce dependence on a continuous cloud connection, but actual latency, energy, and transfer savings remain workload-dependent.
Follow a frame through the whole application
Capture, decode, preparation, transfers, inference, postprocessing, and delivery may all contribute to one result. Timing only the model call does not measure the delay between a scene and a useful application response.
Define the timing boundary first. A start might mean application arrival, completed decoding, or exposure completion; an end might mean generated results, display, or a submitted business action. Different boundaries answer different questions. Two numbers cannot be compared usefully until their timestamps describe compatible boundaries. An asynchronous call returning does not necessarily mean inference has completed; use the event at which the required result is actually available.
The construction below models strictly serial processing of one frame with no queue. Source frame rate supplies a separate upper limit; camera waiting is not silently moved in or out of the processing duration. Every number is invented for reproducible teaching, not a performance claim for the board.
Capture and decode
Resolution, format, source rate
Host preparation
Resize, layout, transfers
NPU inference
Supported compiled model
Postprocess and deliver
Filtering, logic, display
A fivefold inference speedup gives only 1.19× overall
Assume 12 ms of preparation,5 ms of inference, and 8 ms of postprocessing. Total processing latency is 25 ms. Reducing the inference stage to 1 ms leaves 21 ms overall: a 25/21≈1.19× speedup for the serial path, rather than 5×.
In Amdahl form, the accelerated fraction is f=5/25=0.2 and the local speedup is s=5. Overall speedup is 1/((1-f)+f/s). Even zero inference time leaves 20 ms of fixed work, so serial processing capacity can rise from 40 frames/s to at most 50 under these assumptions.
With a 30-frame/s source, both budgets can keep pace, and delivered rate is 30 in this idealized, queue-free, loss-free budget. A real system still needs capture and delivery checks. A new accelerator may still lower processing latency or release resources, but this example does not make the camera produce more frames. Report throughput, latency, and spare capacity separately.
Eight exact checks make the budget inspectable
The following standard-library code uses fractions without contacting a camera, NPU, or model. Capacity denotes the theoretical service rate of this serial, nonoverlapping construction. Delivered rate is additionally source-limited. Neither is a device benchmark.
# Hypothetical serial budget; no NPU, camera or model is run.
from fractions import Fraction as F
def budget(pre_ms,infer_ms,post_ms,source_fps):
stages = [F(pre_ms),F(infer_ms),F(post_ms)]
if any(x<0 for x in stages) or sum(stages)<=0 or source_fps<=0:
raise ValueError("positive total and source rate required")
latency = sum(stages)
capacity = F(1000)/latency
return latency, capacity, min(F(source_fps),capacity)
base = budget(12,5,8,30)
fast = budget(12,1,8,30)
assert base == (25,40,30)
assert fast[0] == 21
assert fast[1] == F(1000,21)
assert fast[2] == 30 # source rate still limits delivered frames
assert base[0]/fast[0] == F(25,21)
assert F(1)/(F(4,5)+F(1,5)/5) == F(25,21) # Amdahl form
assert budget(12,1,8,50)[2] == F(1000,21)
assert fast[0]>20 # misses a hypothetical20ms processing deadline
print("8 budget checks passed; speedup=25/21, not5")
All eight assertions passed locally. They also show why an inference-only target can miss a business deadline:1 ms of inference still gives 21 ms of total processing, exceeding a hypothetical 20 ms processing deadline. A fast kernel is only one part of the requirement.
Overlapping stages change the model
A real application may prepare the next frame on the CPU while the NPU processes the preceding frame. Steady-state throughput is then not simply 1000 divided by summed stage durations. It depends on overlap, shared CPU capacity, memory bandwidth, transfers, and synchronization. Preparation and postprocessing contending for one CPU cannot be treated as independent machines.
This changes the assumptions rather than invalidating the serial calculation. State whether a result concerns single-frame latency, long-window completion rate, or multiframe throughput. Do not turn a serial bound into a pipeline benchmark promise, or use high pipeline throughput to hide a frame’s waiting time.
For multiple cameras and models, retain source identity and completion timestamps. An acceptable average FPS can hide one persistently slow stream. Long queues can also produce answers about old images. Event-oriented applications need freshness and missed-event information alongside device utilization.
Validate the deployed task before comparing speed
The Raspberry Pi introduction describes DX-COM, .dxnn artifacts, and DX-RT. The important qualifier is supported models: an arbitrary ONNX file is not an unconditional deployment guarantee. After conversion, check operators, input layout, quantization, and postprocessing against the intended task.
Establish a reference-precision baseline and use authorized, non-private samples representative of the deployment distribution. Compare categories, boxes, scores, or final task decisions rather than only checking whether execution raised an error. Low light, blur, and occlusion may expose weaknesses absent from clean example images.
Keep model version, input dimensions, preprocessing, batch, and acceptance criteria fixed for timing comparisons. Changing the model and resolution alongside the accelerator prevents attributing the entire gain to the NPU. Higher FPS does not offset accuracy loss unless the result still meets a previously defined task requirement.
Three watts is not the complete system budget
The approximate 3 W figure refers to the NPU, not every component in a Raspberry Pi system. Host processing, cameras, storage, networking, and cooling carry additional costs. A power supply’s rated capacity is also different from measured operating power. Define whether a measurement covers the chip, board, combined host, or power inlet.
Energy per useful frame should divide system energy over a common observation window by valid completed frames. Dividing a quoted NPU power value by whole-pipeline FPS mixes measurement boundaries. Including invalid outputs or unused frames in the denominator can also make efficiency appear better than the application actually receives.
Sustained operation requires temperature and clock observations rather than a startup peak alone. No hardware was measured for this article, so it reports no power-saving percentage or purchasing verdict. Validate energy and thermal behavior in the eventual enclosure, power configuration, and workload.
Start with one complete, bounded vision task
Choose a task such as classifying defects on non-sensitive workpieces, then fix input specifications and success criteria. Record stage timings, end-to-end latency percentiles, valid completion rate, false positives and misses, and steady-state power and temperature. Attach the observation window and conditions to every number.
If host work dominates, inspect repeated resizing, unnecessary copies, synchronization, and output encoding first. If conversion fails the task requirement, resolve model support and accuracy before chasing speed. More TOPS can directly improve the current target only when accelerated compute is a relevant bottleneck.
The earlier GPU queue article separates available resources from feasible placement. Here the boundary is peak compute versus useful end-to-end improvement. Identify the constraint with evidence instead of selecting the largest specification number.
Sources and validation scope
Discovery followed the Google News listing of the October 16 report, then the October 5 Raspberry Pi introduction. Specification scope follows the Sixfab product page. Both diagrams, the budget, and code are original teaching material. No device or model benchmark was performed.
If the budget helps avoid mistaking TOPS for application frame rate or makes an edge-performance comparison clearer, voluntary support through the section below is welcome.
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